There is known a technique for providing a bypass capacitor (also referred to as a decoupling capacitor or the like) on a power line of an electronic part, such as a semiconductor chip, or an electronic device including an electronic part in terms of power integrity. A technique is known for providing a film-like capacitor between stacked semiconductor chips, besides a technique for providing a chip capacitor as a bypass capacitor. In addition, a technique is known for alternately arranging connection conductors, each connecting power lines of a stacked semiconductor package, and connection conductors, each connecting ground lines, to give a capacitance between adjacent ones of the connection conductors.
Japanese Patent Publications Nos. 2005-244068 and 2009-182087 are examples of related art.
Under the conventional technology, the capacitance and layout of a bypass capacitor may be determined by the configuration of an electronic part or an electronic device, and it may be difficult to achieve satisfactory power integrity for each individual electronic part or electronic device. A necessity may arise for redesign and remanufacture of each individual electronic part or electronic device with the aim of achieving satisfactory power integrity.